This invention relates generally to power transistor switching circuitry. In particular, the invention has to do with transistors in the power stage of apparatus such as inverters that are driven by a current controlled feedback transformer.
A known way of controllably and reliably applying base drive current to transistors operating in a high current, switching mode is by the use of a current controlled feedback transformer (CCFT). The CCFT delivers base drive current from a base drive winding and also has a current feedback winding that provides positive feedback permitting more definite control over the magnitude of base drive current supplied. Among applications in which the current controlled feedback transformer has found favor is in inverters for conversion of direct current to alternating current power. Representative examples of such apparatus may be found in the descriptions of the following patents which are herein incorporated by reference: Heinrich et al. U.S. Pat. No. 3,305,761, Feb. 21, 1967; Kernick U.S. Pat. No. 3,412,316, Nov. 19, 1968; and, Kernick et al. U.S. Pat. No. 3,715,648, Feb. 6, 1973.
One aspect of the application of a CCFT in a power inverter is that the output circuit comprises a pair of power transistors that are to be alternately gated on to derive a desired alternating current output at their common pole output terminal. Basically, the intention is to have one transistor on during a given period corresponding to the desired AC half cycle and conducting from the high or positive DC voltage terminal to the pole output with an abrupt shift at the end of that time period to conduction of the other transistor from the negative or low voltage DC voltage terminal to the pole output terminal. A difficulty with this is that bipolar transistors require a finite time for both turn-on and turn-off and it is the case that commercially available power transistors are characterized by a longer turn-off time than turn-on time. To get a relatively clean output characteristic, conduction of one of the transistors should not occur until the other is fully turned off. Moreover, a shoot-through current, or cross-conduction current, from one transistor to the other when both are on not only degrades the output waveform but may cause catastrophic failure of the transistor that is going through the time required for turn-off.
The art has recognized the problem of shoot-through currents and has devised various means for their avoidance. These involve the provision of an overlap circuit, so designated because its function is to prevent overlap in the conduction of the two transistors, that can allow for the difference in turn-on and turn-off times and can inhibit turn-on of one transistor until the other transistor has completed its turn-off. The overlap circuit can provide a fixed time delay in the application of a turn-on signal. This fixed time delay must be sufficient to permit full turn-off under all operating conditions. Such a delay can introduce significant distortion in the output waveform particularly in high frequency, pulse width modulated inverters. Another technique, not subject to such limitations, is to provide a monitoring circuit that senses the magnitude of an output transistor's current and more precisely permits initiation of turn-on of the other transistor when the first is off.
A general schematic, in simplified form, of a portion of a power inverter with a current monitoring technique in accordance with prior practice is illustrated in FIG. 1. One of pair of power output transistors, designated element 10, is connected between positive direct voltage terminal 12 and the pole output terminal 14. The other of the pair of power output transistors is not shown but would be connected between a negative direct voltage terminal and pole output terminal 14. The circuitry illustrated with transistor 10 in FIG. 1 is substantially duplicated in the unillustrated circuitry for the other power output transistor.
In the illustrated half of the circuit transistor 10 is associated with a CCFT 16 that provides turn-on and turn-off base drive signals that are supplied to the base of the transistor 10 through a base drive winding 18 with a current feedback winding 20 for positive control. The other side of the CCFT 16 is supplied from a direct current source 22 that is current limited and is applied to the center tap of winding 24. Controlled frequency pulses applied to turn-on and turn-off terminals 25 and 26, respectively, initiate conduction of respective control transistors 27 and 28 at those terminals. These current paths determine the application of current from the current source 22 through respective parts of the winding 24 that result in turn-on and turn-off base drive to the output transistor 10. In this scheme, current monitoring is achieved by a resistor 30 connected in the circuit including winding 24 and "turn-on" transistor 28. A current detector 32 senses the current across resistor 30 and provides a signal on line 34 that is used to control signals to the other output transistor's circuit, i.e., to inhibit the application of a turn-on signal in the other half circuit until transistor 10 is fully off and the sensed current falls to zero.
In operation, when transistor 10 is turning off, its current is reflected through the CCFT 16 and flows through the sensing resistor 30. When this current decays to zero, it indicates that the carrier sweep-out period for the output transistor 10 has been completed and the transistor 10 is off. Until that event, the other output transistor is inhibited from turning on. Current and voltage values can be suitably selected for proper operation. For example, the current source can be implemented from a +28 volt DC supply with a current limit level of 100 milliamperes. The current through the sensing resistor 30 may reach about five amperes at maximum output current and deliver a voltage of less than about 500 millivolts for proper operation.
In practical application, an inverter with a monitoring circuit as shown in FIG. 1 functions properly when the current detector circuit 30-32 is physically close to, say within about five feet (1.5 m.) of, the inverter output transistor 10. The physical proximity is important because an increase of the length of conductive leads inherently creates an increased probability that the current sensing will be affected by noise signals and will not function properly. Such considerations are particularly significant in applications such as inverters for aircraft power systems.
There is increasing interest in having aircraft power generated by an AC generator directly from an engine running at a variable speed and then modifying the output of the generator by static power conversion equipment such as a rectifier and inverter system to achieve the desired output AC power. In one specific application for an aircraft inverter power system, a requirement to be met is that the control circuitry be located a distance of 35 feet (10.5 m.) from the CCFT's and output transistors. This happened to be necessary in order to keep the control circuitry at a location where it could be adequately cooled, while the inverter transistors and CCFT's could sustain a higher temperature. The 35 feet or more of conductive leads required between these segments of the system must pass through an environment of high electrical noise and, therefore, the resistive monitoring method of FIG. 1 would not be suitable. It is therefore a purpose of the present invention to provide an alternative current monitoring system for power inverters such as those generally illustrated by FIG. 1, or other applications of CCFT driven transistor switches, so that the proper functioning of the current detection circuit is independent of the distance between the control circuitry and the major elements of the power inverter, or the CCFT and power switches.
In brief summary, the present invention achieves this objective by doing without a resistive current sensor and instead sensing a voltage which changes as a result of transistor turn-off. The output transistor's current can be indirectly sensed by monitoring the output voltage of the current limited source to the CCFT or another voltage that similarly varies upon transistor turn-off. This requires no change to the CCFT and output transistor configuration from that which has previously been used. The effect relied on is to initiate turn-off by effectively shorting the secondary side of the CCFT (the side opposite that to which the output transistor are connected) as previously. This shorting of the secondary is reflected to the primary of the CCFT which shorts the voltage across the base emitter junction of the output transistor. As soon as the primary is shorted, the base current decreases and the output transistor enters the carrier sweep-out or turn-off period. During this time, collector current flows at a decaying rate and is reflected in the shorting current of the CCFT secondary. This shorting current will be greater than the current limited magnitude of the current source on the secondary side so that the output of the current source is shorted resulting in a sensed voltage of approximately zero volts. After carriers are fully swept from the base of the output transistor and it is off, the reflected output current in the CCFT secondary is reduced to zero. This removes the short on the current limited source and voltage rises to approximately its supply level. The occurrence of this rise in voltage signifies a turn-off of the output transistor and hence provides the signal that is used for controlling the application of a turn on signal to the other output transistor and prevents damaging shoot-through currents.
As can be seen, the inventive circuit does not require conduction of high currents through a long distance of cabling. Thus, signal wire size may be reduced and freedom from noise is provided. Further, the voltage that signifies the turn-off of the output transistor is a relatively high level signal, such as about 28 volts, which is sufficient to be unaffected by electromagnetic interference. Also, it is beneficial that the sensing circuitry can be located where the temperature environment is less extreme than that in which the inverter transistors are located.